Processors for servers, Xeon

The cost savings makes components used in servers are increasingly similar to those used in desktops, which naturally includes the processors. Although there are specific processors for use in servers such as Sun UltraSPARC T1 (Niagara), the vast majority of processor-based servers are "domestic" as the Core 2 Duo and Athlon X2, or even in low-cost processors, such as Celeron and Sempron.

Nevertheless, both Intel and AMD to invest considerable sums in their line of processors aimed at servers: Intel's side we have the line Xeon (pronounced "Zion") and the AMD side we have the Opteron. Both platforms are based on the same architecture used in domestic processors (again the issue of cost savings), but have important differences in the case of servers, such as the use of more cache, and multiprocessing support the presence of more nuclei, features that can be implemented without major changes in processor design. In general, new projects began his career as chips for servers (where the manufacturers can work with larger profit margins) and only after some time is coming to the domestic market. Thus, the lines of server processors are almost always one step ahead.

Although more expensive, they are useful in situations where you need a server with more processing power as possible. Because a server is used for long periods, the cost of the processor is amortized over a long period, so the additional expense could end up not making much difference in the end.

Both the Xeon and Opteron have gone through several incarnations. In order to say "a server with Intel Xeon" is not much more descriptive than saying "a PC with Intel." There were so many versions of the Xeon processors that can handle both a server ultra-high-end processors with 4 cores and 16 as a fatted calf with over 10 years old:).

The first model was based on the old Xeon Pentium II Deschutes core (0.25 micron) and was launched in 1998. Unlike the Pentium II, where the L2 cache operating at half the frequency of the processor, the Xeon used full-speed cache, with versions of 512 KB, 1 MB and 2 MB. At the time, there were no multi-core processors, but you could stick 4 Xeons in a motherboard based on chipset i450NX.

This initial version was replaced in 1999 by a Pentium III versions. The first version (core Tanner) was based on the Katmai core (the same used in the initial version of the Pentium III regular), but differed by up to exist in versions with 2 MB of L2 cache. Following the launch of the Pentium III Coppermine, Intel launched the Core Xeon Cascades, which has adopted the use of on-die L2 cache, again in versions with up to 2 MB of cache.

Until then, the brand name "Xeon" was used in conjunction with the "Pentium", so the Xeon based on the Pentium III was called "Pentium III Xeon processors." In 2001, with the launch of the first models based on the NetBurst architecture (Pentium 4) processors have become known simply as "Xeon". There then arose the series' Xeon UP (uni-processor), "Xeon DP (dual-processor) and" Xeon MP (multi-processor). As the names suggest the main difference between the three series is that the UP series does not support multiprocessing, DP allows the use of only two processors, while the MP allows the use of four processors (or up to eight, with the use of hardware).

Early versions of the Xeon DP core were based on Foster also produced using a technique of 0.18 micron, the same used by early versions of the Pentium 4. They shared the same problems as the domestic version of the Pentium 4 is the low performance per clock cycle and the use of RAMBUS memory, which increases the set without adding tangible performance gains. Unlike previous models, they brought only 256 KB of L2 cache, exactly the same amount used in the Pentium 4 home based on the Willamette core. This initial version was produced in versions with clock from 1.4 to 2.0 GHz

In 2002 came the Prestonia core, manufactured using the same technique used in the 0.13 micron Pentium 4 Northwood core. He had 512 KB of L2 cache on-die (like Northwood), the biggest advantage was not the processor itself, but the E7500 chipset released in conjunction with it, which supported the DDR in dual-channel, more a year before Intel chipsets for desktops. The core Xeon Prestonia was produced in versions 1.8 to 3.06 GHz, each with 512 KB of L2 cache.

These initial versions of the Xeon socket 603 plates used, unlike the Pentium 4 desktop processor, which at the time were still using socket 478 boards.The additional pins served to increase the electrical supply to the processor and to implement the SMP support.

An example of a socket 603 board for use in servers that was relatively popular Tyan Tiger i7500 is the S2722, which was launched in September 2002.You may notice that she does not have an AGP slot and has only three expansion slots (two PCI-X and one PCI 32-bit). The two PCI-X were generally used for installing SCSI or SAS controllers, while PCI was in reserve in case of need to install any peripheral legacy:

The socket 603 platform has a relatively short and narrow boards with bus 400 MT / s (100 MHz to 4 transfers per cycle). In November 2002, Intel began the transition to the 604 platform, releasing updated versions of core processors based on the Prestonia.

Despite having a single pin plug over the socket 604 boards represent a very different platform. Two crucial differences are the support of bus 533, 667 or 800 MT / s (according to the chipset used) and supports the use of four or eight processors. The socket 604 platform was used by both models of the Xeon DP and Xeon MP. Naturally, the socket 603 processors are compatible with socket 604 boards and vice versa.

The Gallatin Prestonia was succeeded by that, although there was a single-core processor, includes 1 or 2 MB on-die L3 cache, according to the release.Within the DP series was launched in versions 2.4 and 3.2 GHz

All models of the Xeon I quoted here only support 32-bit instructions. The first Xeons with EM64T support to all the models were based on the Noconacore, introduced in 2004, a series that included models from 2.8 to 3.6 GHz They were followed by models based on core Irwindale, launched in 2005 which included 2 MB of cache L2 and reached the mark of the 3.8 GHz

In May 2006 it launched the 5000 series, based on core Dempsey, produced in 0065 a technique micron. They are dual-core processors, which have 4 MB of L2 cache L2 (2x 2MB), which represented a huge leap over previous versions. From them, Intel has started using a numbering system to differentiate between processors, since the clock frequency is no longer a factor.

Inside the numbering system, the processors are members of the 3xxx UP serious, does not support multiprocessing, the 5xxx series are members of the DP, while the 7xxx series are part of MP. This system is similar to that used by AMD on Opteron.

This brings us back to today, with the models of the Xeon platform-based Core. The change resulted in a trend similar to what we had on the desktop, where we saw the migration of the Pentium D to Core 2 Duo processors, ie processors clocked lower, but they offer a much higher performance per clock and a lower electrical consumption . In general we can say that a Core Xeon-based platform offers a performance per core similar to an old Xeon (NetBurst-based platform) with twice the clock.

The first part of the new line is the core Woodcrest, launched in June 2006, a day before the Core 2 Duo for desktop PCs. It was used on 51xx series models, including the Xeon 5110 (1.6 GHz, 4 MB), 5120 (1.83 GHz, 4 MB), 5130 (2.0 GHz, 4 MB), 5140 (2.33 GHz, 4 MB), 5150 ( 2.66 GHz, 4 MB) and5160 (3.0 GHz, 4 MB).

All are dual-core processors with support for 64-bit instructions, equipped with 4 MB of L2 cache (unified) and using cards based on socket 771. With the exception of 5110 and 5120 (using 1066 MHz bus) all models use 1333 MHz bus

Shortly afterwards, in November 2006 launched the 53xx series, based on core Clovertown. He is a quad-core version of Woodcrest, obtained by combining two processors in the same package, very similar to that made on Core 2 Quad core Kentsfield based.

In November 2007 it was announced the Harpertown, manufactured using the same technique used in the 0045 micron Core 2 Duo processor with Penryn core. In addition to reducing electrical consumption of the processors, the use of new production techniques helped increase the amount of L2 cache 4 MB to 2x 2x 6 MB, resulting in a total of 12 MB per processor.

As with the previous processors and Clovertown, the quad-core Xeon Harpertown are not based on quad-core "native", but obtained by combining two dual-core processors in the same package. This allows Intel to test separately each of the processors, reducing the volume of defective processors that need to be discarded in the final stages of production.